The parallel form of the input sequence is decoded by means of a logical decoding circuit . 此并行形式序列通过逻辑解码电路输入。
An application of logic devices able to program to the decoding circuit 可编程逻辑器件在译码电路中的应用
Colour decoding circuit 彩色解码电路
The results of p & r demonstrate that this design constructs a rs encoding / decoding circuit with a 3 . 2k internal fifo cache embedded , at the scale of 46k gates . its encoding and decoding speed are 66mhz and 47mhz respectively 布局布线后结果表明本文所设计的rs编码器的速度可达到66mhz ;解码速度可达到47mhz ,电路规模为4 . 6万门,包含有3 . 2k的内部缓存fifo的rs编/解码电路。
The hardware system includes power supply circuit , clock reset circuit , jtag model building circuit , decoding circuit , memory interface circuit , man - machine interface circuit and numeric control constant - current source interface circuit 硬件系统主要包括电源电路、时钟复位电路、 jtag仿真接口电路,译码电路、存储器接口电路、人机接口电路、 adc转换电路和数控恒流源接口等。